Differentiable Logic Gate Networks for Low-Latency EEG Classification on Edge Devices

• 类型：arxiv
• 标识：2607.18149
• 链接：https://arxiv.org/abs/2607.18149
• 主分类：engineering
• 形态：method
• 被引：0
• 被引来源：Semantic Scholar + OpenAlex
• S2被引：0
• OpenAlex被引：0
• 影响力被引：0
• TLDR：The results establish logic-based neural architectures as a practical paradigm for resource-constrained brain-computer interfaces, achieving competitive or superior performance while natively satisfying the latency and memory constraints of portable edge deployment.
• OpenAlex ID：W7169887751
• OpenAlex DOI：10.48550/arxiv.2607.18149
• DOI：10.48550/arxiv.2607.18149
• DOI来源：OpenAlex
• 开放获取：green
• 开放获取链接：https://doi.org/10.48550/arxiv.2607.18149
• OpenAlex更新：2026-08-24
• 待LLM分类：否
• 标题中文：Differentiable Logic Gate Networks for Low-Latency EEG Classification on Edge Devices
• TLDR中文：结果表明，基于逻辑的神经架构成为资源受限脑机接口的实用范式，在原生满足便携式边缘部署的延迟和内存约束的同时，取得了有竞争力甚至更优的性能。
• 成熟度：research
• 场景：edge-inference、eeg-classification、binary-neural-net
• 来源文件：
• /inbox/tom/_candidates/2026-07-24-agent-rag-longcontext-candidates.json
• [S2 enrich]
• [OpenAlex backfill]